1. Field of the Invention
The present invention relates to flash memory, and more particularly to flash memory for both code and data storage.
2. Description of Related Art
Flash memory is a non-volatile computer storage technology that is electrically erasable typically in large blocks, which gives it a speed advantage over small-block EEPROM technology. Flash memory stores digital data in an array of memory cells made from charge-storing floating-gate transistors, which may be single-level or multi-level. The array may be NOR-type or NAND-type. While both serial and parallel flash memory interfaces are in use, serial flash is becoming increasingly popular due to cost, space and pin-count advantages.
In NOR-type flash memory, each memory cell is connected between a bit line and ground. Reading typically is done by bringing a word line high, whereby the corresponding cell either pulls the output bit low or not depending on the logical state of the cell. Writing (setting the cell to a logical 0) typically is done on a word-by-word or byte-by-byte basis using hot electron injection. Erasing (setting the cell to a logical 1) typically is done on a block-by-block basis using quantum tunneling.
The characteristics of standard NOR flash are lower density, high read speed, slow write speed, slow erase speed, and a random access interface. Since NOR flash has fast random-access memory read, microprocessors generally can use NOR flash memory as execute in place (“XIP”) memory.
In NAND-type flash memory, a number of memory cells are connected in series between a bit line and ground. Reading typically is done by bringing the selected word line to a high voltage just over VT of an erased cell and the other word lines to cells within the string to a high voltage just over VT of a programmed cell, whereby the string under control of the corresponding cell either pulls the output bit low or not depending on the logical state of the cell. The strings in turn are connected to a NOR-type bit line array through a select gate. Programming (setting the cell to a logical 0) typically is done on a page-by-page basis (each block consists of a number of pages) using tunnel injection. Erasing (setting the cell to a logical 1) typically is done on a block-by-block basis using tunnel release.
The characteristics of NAND flash are high density, medium read speed, high write speed, high erase speed, and an indirect or I/O like access. NAND-type flash memory is particularly well suited to systems requiring high capacity data storage. While NAND-type flash memory requires additional transistors relative to a same-sized NOR type flash memory, significantly reduced area requirements for the ground wires and bit lines allows a higher density and larger capacity per chip, at lower cost. NAND-type flash memory is written page-by-page, which is very suitable for sequential writes but not optimal for random access writes. Moreover, while reading and programming is performed page-by-page, erasure can only be performed on a block basis. Therefore, standard NOR-type flash memory is advantageous over standard NAND-type flash memory for random-access and execute in place. While code may be executed using NAND-type flash memory, it is typically done by copying a page into memory-mapped RAM and executed the code there.
To take advantage of the inherent properties of NOR-type and NAND-type flash memory, some systems such as full featured cell phones use memory architectures that combine NOR with NAND for data storage, with the different types of memory frequently being stacked in multi-chip packages (“MCP”) to create a single component. See, e.g., Toshiba America Electronic Components, Inc., NAND vs. NOR Flash Memory: Technology Overview, Apr. 25, 2006. Unfortunately, the additional complexity and cost to these systems of managing both types of memory with their own interfaces can be significant. Moreover, to support two different interfaces, the controller requires more pins which increase the cost.
Solving the complicated issue of NAND flash management and providing full disk emulation, DiskOnChip can be used for both code and data storage, and is usually found in applications that require an operating system and a file system such as feature phones and smartphones, thin clients, POS workstations, digital gateways, set top boxes, and telecom infrastructure equipment. See, e.g., M-Systems Inc., Two Technologies Compared: NOR vs. NAND, White Paper, Rev. 1.1, July 2003. However, DiskOnChip is expensive.